As per the linked question, the simplest solution is just to **get the classical processor to perform such operations if possible**. Of course, that may not be possible, so we want to create an *adder*.

There are two types of single bit adder - the *half-adder* and the *full adder*. The half-adder takes the inputs $A$ and $B$ and outputs the 'sum' (XOR operation) $S = A\oplus B$ and the 'carry' (AND operation) $C = A\cdot B$. A full adder also has the 'carry in' $C_{in}$ input and the 'carry out' output $C_{out}$, replacing $C$. This returns $S=A\oplus B\oplus C_{in}$ and $C_{out} = C_{in}\cdot\left(A+B\right) + A\cdot B$.

## Quantum version of the half-adder

Looking at the CNOT gate on qubit register $A$ controlling register $B$: \begin{align*}\text{CNOT}_{A\rightarrow B}\left|0\right>_A\left|0\right>_B &= \left|0\right>_A\left|0\right>_B \\ \text{CNOT}_{A\rightarrow B}\left|0\right>_A\left|1\right>_B &= \left|0\right>_A\left|1\right>_B \\\text{CNOT}_{A\rightarrow B}\left|1\right>_A\left|0\right>_B &= \left|1\right>_A\left|1\right>_B \\\text{CNOT}_{A\rightarrow B}\left|1\right>_A\left|1\right>_B &= \left|1\right>_A\left|0\right>_B, \\
\end{align*} which immediately gives the output of the $B$ register as $A\oplus B = S$. However, we have yet to compute the carry and the state of the $B$ register has changed so we also need to perform the AND operation. This can be done using the 3-qubit Toffoli (controlled-CNOT/CCNOT) gate. This can be done using registers $A$ and $B$ as control registers and initialising the third register $\left(C\right)$ in state $\left|0\right>$, giving the output of the third register as $A\cdot B = C$. Implementing Toffoli on registers $A$ and $B$ controlling register $C$ followed by CNOT with $A$ controlling $B$ gives the output of register $B$ as the sum and the output of register $C$ as the carry. A quantum circuit diagram of the half-adder is shown in figure 1.

Figure 1: Circuit Diagram of a half-adder, consisting of Toffoli followed by CNOT. Input bits are $A$ and $B$, giving the sum $S$ with carry out $C$.

## Quantum version of the full adder

Shown in figure 2, a simple way of doing this for single bits is by using $4$ qubit registers, here labelled $A$, $B$, $C_{in}$ and $1$, where $1$ starts in state $\left|0\right>$, so the initial state is $\left|A\right>\left|B\right>\left|C_{in}\right>\left|0\right>$:

- Apply Toffoli using $A$ and $B$ to control $1$: $\left|A\right>\left|B\right>\left|C_{in}\right>\left|A\cdot B\right>$
- CNOT with $A$ controlling $B$: $\left|A\right>\left|A\oplus B\right>\left|C_{in}\right>\left|A\cdot B\right>$
- Toffoli with $B$ and $C_{in}$ controlling $1$: $\left|A\right>\left|A\oplus B\right>\left|C_{in}\right>\left|A\cdot B\oplus\left(A\oplus B\right)\cdot C_{in} = C_{out}\right>$
- CNOT with $B$ controlling $C_{in}$: $\left|A\right>\left|A\oplus B\right>\left|A\oplus B\oplus C_{in} = S\right>\left|C_{out}\right>$

A final step to get back the inputs $A$ and $B$ is to apply a CNOT with register $A$ controlling register $B$, giving the final output state as $$\left|\psi_{out}\right> = \left|A\right>\left|B\right>\left|S\right>\left|C_{out}\right>$$

This gives the output of register $C_{in}$ as the sum and the output of register $2$ as carry out.

Figure 2: Circuit diagram of a full adder. Input bits are $A$ and $B$ along with a carry in $C_{in}$, giving the sum $S$ with carry out $C_{out}$.

## Quantum version of the ripple carry adder

A simple extension of the full adder is a ripple carry adder, named as it 'ripples' the carry out to become the carry in of the next adder in a series of adders, allowing for arbitrarily-sized (if slow) sums. A quantum version of such an adder can be found e.g. here

## Actual implementation of a half-adder

For many systems, implementing a Toffoli gate is far from as simple as implementing a single qubit (or even two qubit) gate. This answer gives a way of decomposing Toffoli into multiple smaller gates. However, in real systems, such as IBMQX, there can also be issues on which qubits can be used as targets. As such, a real life implementation on IBMQX2 looks like this:

Figure 3: Implementation of a half-adder on IBMQX2. In addition to decomposing the Toffoli gate into multiple smaller gates, additional gates are required as not all qubit registers can be used as targets. Registers q[0] and q[1] are added to get the sum in q[1] and the carry in q[2]. In this case, the result q[2]q[1] should be 10. Running this on the processor gave the correct result with a probability of 42.8% (although it was still the most likely outcome).

Are there any quantum-computer adders? – John Duffield – 2018-04-09T22:48:28.050

@JohnDuffield I'm not sure whether you mean approximate quantum (state) adders (exact state adders are apparently forbidden) or implementations of 'classical' adders on a quantum computer - I haven't tried this particular code out though - or something different?

– Mithrandir24601 – 2018-04-09T23:34:34.517How are the numbers represented? Is it in Binary? – user3483902 – 2018-04-09T23:37:12.610

@user3483902 In this case, single bits $0$ and $1$ using the states $\left|0\right>$ and $\left|1\right>$ - that is, the 'number' $A$ can be either $0$ or $1$, as can the 'number' $B$ etc. – Mithrandir24601 – 2018-04-09T23:39:49.353

@Mithrandir24601 : does it matter? Isn't the answer no in either case? I've actually built a parallel adder myself. I have a Cmputer Science degree. – John Duffield – 2018-04-10T06:51:05.777