Property Specification Language
Property Specification Language (PSL) is a temporal logic extending Linear temporal logic with a range of operators for both ease of expression and enhancement of expressive power. PSL makes an extensive use of regular expressions and syntactic sugaring. It is widely used in the hardware design and verification industry, where formal verification tools (such as model checking) and/or logic simulation tools are used to prove or refute that a given PSL formula holds on a given design.
PSL was initially developed by Accellera for specifying properties or assertions about hardware designs. Since September 2004 the standardization on the language has been done in IEEE 1850 working group. In September 2005, the IEEE 1850 Standard for Property Specification Language (PSL) was announced.
Syntax and semantics
PSL can express that if some scenario happens now, then another scenario should happen some time later. For instance, the property "a request should always eventually be grant ed" can be expressed by the PSL formula:
always (request > eventually! grant)
The property "every request which is immediately followed by an ack signal, should be followed by a complete data transfer, where a complete data transfer is a sequence starting with signal start, ending with signal end in which busy holds at the meantime" can be expressed by the PSL formula:
(true[*]; req; ack) => (start; busy[*]; end)
A trace satisfying this formula is given in the figure on the right.
PSL's temporal operators can be roughly classified into LTLstyle operators and regularexpressionstyle operators. Many PSL operators come in two versions, a strong version, indicated by an exclamation mark suffix ( ! ), and a weak version. The strong version makes eventuality requirements (i.e. require that something will hold in the future), while the weak version does not. An underscore suffix ( _ ) is used to differentiate inclusive vs. noninclusive requirements. An a_ and e_ suffixes are used to denote universal vs. existential requirements. Exact time windows are denoted by [n] and flexible by [m..n].
SEREstyle operators
The most commonly used PSL operator is the "suffiximplication" operator (a.k.a. the "triggers" operator), which is denoted by =>. Its left operand is a PSL regular expression and its right operand is any PSL formula (be it in LTL style or regular expression style). The semantics of r =>p is that on every time point i such that the sequence of time points up to i constitute a match to the regular expression r, the path from i+1 should satisfy the property p. This is exemplified in the figures on the right.
The regular expressions of PSL have the common operators for concatenation ( ;), Kleeneclosure ( *), and union ( ), as well as operator for fusion ( :), intersection ( \&\&) and a weaker version ( \&), and many variations for consecutive counting [*n] and inconsecutive counting e.g. [=n] and [>n].
The trigger operator comes in several variations, shown in the table below.
Here s and t are PSLregular expressions, and p is a PSL formula.
s => t!

if there is a match of s, then there is a match of t on the suffix of the trace,

s > t!

if there is a match of s, then there is a match of t on the suffix of the trace,

s => t

if there is a match of s, then there is a match of t on the suffix of the trace,

s > t

if there is a match of s, then there is a match of t on the suffix of the trace,

Operators for concatenation, fusion, union, intersection and their variations are shown in the table below.
Here s and t are PSL regular expressions.
s ; t 
match of s followed by a match of t, t starts the cycle after s ends 
s : t 
match of s followed by a match of t, t starts the same cycle that s ends 
s  t

match of s or match of t 
s && t 
match of s and match of t, duration of both is of same length 
s & t 
match of s and match of t, duration matches maybe different 
s within t 
match of s within a match of t, abbreviation of ([*]; s; [*]) && (t) 
Operators for consecutive repetitions are shown in the table below.
Here s is a PSL regular expression.
s[*i] 
i consecutive repetitions of s 
s[*i..j] 
between i to j consecutive repetitions of s 
s[*i..] 
at least i to consecutive repetitions of s 
s[*] 
zero or more consecutive repetitions of s 
s[+] 
one or more consecutive repetitions of s 
Operators for nonconsecutive repetitions are shown in the table below.
Here b is any PSL Boolean expression.
b[=i] 
i not necessarily consecutive repetitions of b,

b[=i..j]

at least i and no more than j not necessarily consecutive repetitions of b,

b[=i..] 
at least i not necessarily consecutive repetitions of b,

b[>m]

m not necessarily consecutive repetitions of b ending with b,

b[>m:n] 
at least m and no more than n not necessarily consecutive repetitions of b ending with b,

b[>m..] 
at least m not necessarily consecutive repetitions of b ending with b,

b[>] 
shortcut for b[>1],

LTLstyle operators
Below is a sample of some LTLstyle operators of PSL.
Here p and q are any PSL formulas.
always p

property p holds on every time point 
never p

property p does not hold on any time point 
eventually! p

there exists a future time point where p holds 
next! p

there exists a next time point, and p holds on this point 
next p

if there exists a next time point, then p holds on this point 
next![n] p

there exists an nth time point, and p holds on this point 
next[n] p

if there exists an nth time point, then p holds on this point 
next_e![m..n] p

there exists a time point, within mth to nth from the current where p holds. 
next_e[m..n] p

if there exists at least nth time points, then p holds on one of the mth to nth points. 
next_a![m..n] p

there exists at least n more time points and p holds in all the time points between the mth to the nth, inclusive. 
next_a[m..n] p

p holds on all the next mth through nth time points, however many exist 
p until! q

there exists a time point where q holds, and p hold up until that time point 
p until q

p holds up until a time point where q hold, if such exists 
p until!_ q

there exists a time point where q holds, and p holds up until that time point and in that time point 
p until_ q

p holds up until a time point where q holds, and in that time point, if such exists 
p before! q

p holds strictly before the time point where q holds, and p eventually holds 
p before q

p holds strictly before the time point where q holds, if p never holds, then neither does q 
p before!_ q

p holds before or at the same time point where q holds, and p eventually holds 
p before_ q

p holds before or at the same time point where q holds, if p never holds, then neither does q 
Sampling operator
Sometimes it is desirable to change the definition of the next timepoint, for instance in multiplyclocked designs, or when a higher lever of abstraction is desired. The sampling operator (a.k.a. the clock operator), denoted @, is used for this purpose. The formula p @ c where p is a PSL formula and c a PSL Boolean expressions holds on a given path if p on that path projected on the cycles in which c holds, as exemplified in the figures to the right.
The first property states that "every request which is immediately followed by an ack signal, should be followed by a compete data transfer, where a complete data transfer is a sequence starting with signal start, ending with signal end in which data should hold at least 8 times:
((true[*]; req; ack) => (start; data[=8]; end)
But sometimes it is desired to consider only the cases where the above signals occur on a cycle where clk is high. This is depicted in the second figure in which although the formula
((true[*]; req; ack) => (start; data[*3]; end) @ clk
uses data[*3] and [*n] is consecutive repetition, the matching trace has 3 nonconsecutive time points where data holds, but when considering only the time points where clk holds, the time points where data hold become consecutive.
The semantics of formulas with nested @ is a little subtle. The interested reader is referred to [2].
Abort operators
PSL has several operators to deal with truncated paths (finite paths that may correspond to a prefix of the computation). Truncated paths occur in boundedmodel checking, due to resets and in many other scenarios. The abort operators, specify how eventualities should be dealt with when a path has been truncated. They rely on the truncated semantics proposed in [1].
Here p is any PSL formula and b is any PSL Boolean expression.
p async_abort b 
either p holds or up until b holds, or p does not fail;

p sync_abort b 
either p holds or up until b holds, or p does not fail;

p abort b 
equivalent to p async_abort b 
Expressive power
PSL subsumes the temporal logic LTL and extends its expressive power to that of the omegaregular languages. The augmentation in expressive power, compared to that of LTL which has the expressive power of the starfree ωregular expressions, can be attributed to the suffix implication, a.k.a. triggers operator, denoted ">". The formula r > f where r is a regular expression and f is a temporal logic formula holds on a computation w if any prefix of w matching r has a continuation satisfying f. Other nonLTL operators of PSL are the @ operator, for specifying multiplyclocked designs, the abort operators, for dealing with hardware resets, and local variables for succinctness.
Layers
PSL is defined in 4 layers: the Boolean layer, the temporal layer, the modeling layer and the verification layer.
 The Boolean layer is used for describing a current state of the design and is phrased using one of the abovementioned HDLs.
 The temporal layer consists of the temporal operators used to describe scenarios that span over time (possibly over an unbounded number of time units).
 The modeling layer can be used to describe auxiliary state machines in a procedural manner.
 The verification layer consists of directives to a verification tool (for instance to assert that a given property is correct or to assume that a certain set of properties is correct when verifying another set of properties).
Language compatibility
Property Specification Language can be used with multiple electronic system design languages (HDLs) such as:
 VHDL (IEEE 1076)
 Verilog (IEEE 1364)
 SystemVerilog (IEEE 1800)
 SystemC (IEEE 1666) by Open SystemC Initiative (OSCI).
When PSL is used in conjunction with one of the above HDLs, its Boolean layer uses the operators of the respective HDL.
References
 18502005 – IEEE Standard for Property Specification Language (PSL). 2005. doi:10.1109/IEEESTD.2005.97780. ISBN 073814780X.
 IEC 62531:2007 625312007 – IEC 62531 Ed. 1 (200711) (IEEE Std 18502005): Standard for Property Specification Language (PSL). 2007. doi:10.1109/IEEESTD.2007.4408637. ISBN 9780738157276.
 18502010 – IEEE Standard for Property Specification Language (PSL). 2010. doi:10.1109/IEEESTD.2010.5446004. ISBN 9780738162553.
 IEC 62531:2012 625312012 – IEC 62531:2012(E) (IEEE Std 18502010): Standard for Property Specification Language (PSL). 2012. doi:10.1109/IEEESTD.2012.6228486. ISBN 9780738172996.
 Eisner, Cindy; Fisman, Dana; Havlicek, John; Lustig, Yoad; McIsaac, Anthony; Van Campenhout, David (2003). "Reasoning with Temporal Logic on Truncated Paths". Computer Aided Verification (PDF). Lecture Notes in Computer Science. 2725. p. 27. doi:10.1007/9783540450696_3. ISBN 9783540405245.
 Eisner, Cindy; Fisman, Dana; Havlicek, John; McIsaac, Anthony; Van Campenhout, David (2003). "The Definition of a Temporal Clock Operator". Automata, Languages and Programming (PDF). Lecture Notes in Computer Science. 2719. p. 857. doi:10.1007/3540450610_67. ISBN 9783540404934.
External links
 IEEE 1850 working group
 IEEE Announcement September 2005
 Accellera
 Property Specification Language Tutorial
 Designers guide to PSL